Photolithographic techniques for producing angled lines

ABSTRACT

The present subject matter allows non-orthogonal lines to be formed at the same thickness as the orthogonal lines so as to promote compact designs, to be formed with even line edges, and to be formed efficiently. One aspect of the present subject matter relates to a method for forming non-orthogonal images in a raster-based photolithographic system. According to various embodiments of the method, a first image corresponding to a first data set is formed on a reticle when the reticle is at a first rotational position θ 1 . The reticle is adjusted to a second rotational position θ 2 . A second image corresponding to a second data set is formed on the reticle when the reticle is at the second rotational position θ 2 . The second image is non-orthogonal with respect to the first image. Other aspects are provided herein.

CROSS REFERENCE TO RELATED APPLICATIONS

The present application is a continuation of U.S. application Ser. No.10/215,214, filed Aug. 8, 2002, which is incorporated herein byreference.

This application is related to the following commonly assigned U.S.patent application which is herein incorporated by reference in itsentirety: “Three Terminal Magnetic Random Access Memory,” Ser. No.09/940,976, filed on Aug. 28, 2001.

TECHNICAL FIELD

This disclosure relates generally to integrated circuits, and moreparticularly, to semiconductor photolithographic processes.

BACKGROUND

Photolithographic processes in the semiconductor industry use rasterscanning methods to produce masks. FIG. 1 illustrates a schematicdiagram of a known raster-based photolithographic system. One example ofa raster-based photolithographic process is an electron beam (e-beam)process. In an e-beam system 102, for example, a reticle 104 is placedon a table 106 which provides a motion to the reticle along a Y axisusing a data set 108 and a worktable motion control module 110, and anelectronic beam 112 sweeps back and forth along an X axis using the dataset 108 and an e-beam control module 114 to provide a raster motion. Thesystem performs raster-based imaging by sweeping the e-beam back andforth along the X axis, turning the e-beam on over designated areas andoff until the next designated area, and appropriately stepping theworktable along the Y axis.

Raster-based photolithographic processes are limited to generating onlyorthogonal line patterns. With respect to an e-beam system, for example,the size of images is limited to integer multiples of the e-beam spotsize. The e-beam spot size can be considered to be a pixel of thepattern. A series of stepped images is used to form lines atnon-orthogonal angles with respect to a base direction.

FIG. 2 illustrates a stepped angled image formed using the knownraster-based photolithographic system of FIG. 1. In this figure,parallel non-orthogonal lines are drawn at an angle of about 45° withrespect to the base direction, which functions as a reference. Thepattern is built by writing a spot 203 in the X direction, a spot 205 inthe Y direction, a spot 207 in the X direction, and so on.

One problem associated with forming non-orthogonal lines using araster-based photolithographic process is that the non-orthogonal linesrequire a larger area than the orthogonal lines. Although the minimumhorizontal or vertical line width is equal to an e-beam spot size(pixel), the stepped 45° line (a slope of 1:1) requires two pixels 209and 211, and the space between parallel 45° lines also requires twopixels 213 and 215. In an image containing parallel 30° lines, forexample, even more space is required for the lines and the space betweenthe lines.

Another problem associated with forming non-orthogonal lines using araster-based photolithographic process is that the lines are formed withuneven edges. Although some smoothing of line edges occur during theexposure and development of the mask, the line might not smoothcompletely depending on the resist sensitivity. The result is an unevenline edge.

Other problems associated with forming non-orthogonal lines using araster-based photolithographic process involve the use of more metal toform a stepped diagonal line than a minimum width diagonal line.Additionally, writing stepped images which requires a number of e-beamsweeps is less efficient than writing an orthogonal line that requiresonly one sweep.

Most semiconductor chip layouts are successfully designed usingorthogonal lines. When a small number of non-orthogonal lines arerequired in a layout, they have been formed using stepped images.However, the problems associated with using stepped images to formnon-orthogonal lines are exacerbated when a design requires morenon-orthogonal lines to be formed in a smaller space.

Therefore, there is a need in the art to provide improvedphotolithographic techniques to form angled lines.

SUMMARY

The above mentioned problems are addressed by the present subject matterand will be understood by reading and studying the followingspecification. The present subject mater provides improvedphotolithographic techniques to form non-orthogonal (angled) lines onworkpieces such as wafers and reticles. The present subject matterallows non-orthogonal lines to be formed at the same thickness as theorthogonal lines (a minimum width corresponding to a pixel or e-beamspot, for example) so as to promote higher density designs, to be formedwith even line edges, and to be formed efficiently.

Various embodiments of the preset subject matter involve formingnon-orthogonal lines on a reticle. The non-orthogonal lines in thereticle result in non-orthogonal lines in a wafer. Various embodimentsof the present subject matter involve rotating the relative positionbetween a wafer and a reticle (by rotating the wafer and/or reticle) toform non-orthogonal lines on the wafer using orthogonal lines on thereticle. Various embodiments of the present subject matter involvedirectly writing non-orthogonal lines on a rotated wafer.

One aspect of the present subject matter relates to a method for formingnon-orthogonal images in a raster-based photolithographic system.According to various embodiments of the method, a first imagecorresponding to a first data set is formed on a reticle when thereticle is at a first rotational position θ₁. The reticle is adjusted toa second rotational position θ₂. A second image corresponding to asecond data set is formed on the reticle when the reticle is at thesecond rotational position θ₂. The second image is non-orthogonal withrespect to the first image.

One aspect of the present subject matter relates to a method for formingan integrated circuit metallization layer using a damascene process anddirect write raster-based photolithographic system using an electronbeam or other similar means. According to various embodiments of thismethod, an insulator layer is deposited on a wafer, and a layer ofresist is deposited on the insulator layer. A first image correspondingto a first data set is formed on the layer of resist when the wafer isat a first rotational position θ₁ with respect to a reference. The waferis adjusted to a second rotational position θ₂ with respect to thereference. A second image corresponding to a second data set is formedon the first layer of resist when the reticle is at a second rotationalposition θ₂. The second image is non-orthogonal with respect to thefirst image. The first image and the second image are developed, and thewafer is processed using a damascene metal fill to form a metallizationlayer based on the developed first image and the developed second image.

One aspect of the present subject matter relates to a method for formingintegrated circuit metallization layers. According to variousembodiments of the method, a first metal layer is deposited on a wafer,and a first layer of resist is deposited on the first insulator layer. Afirst image corresponding to a first data set on a first reticle isformed on the layer of resist when the wafer is at a first rotationalposition θ₁ with respect to a reference. The first image is developed,and the wafer is processed to form a portion of the first metallizationlayer based on the developed first image. A second resist layer isdeposited over the first metallization layer. A second reticle isregistered to a second rotational position θ₂ with respect to thereference. A second image corresponding to a second data set is formedon the second layer of resist when the wafer is at the second rotationalposition θ₂. The second image is non-orthogonal with respect to thefirst image. The second image is developed, and the reticle is processedto form a complete metallization layer based on the developed secondimage. This may be accomplished either by rotating the reticle withrespect to the wafer or the wafer with respect to the reticle. One ofordinary skill in the art will understand, upon reading andcomprehending this disclosure, that non-orthogonal metallization layercan be formed when the reticle has non-orthogonal images (formed byrotating the reticle with respect to the raster-based system), can beformed by rotating the wafer or reticle with respect to the raster-basedsystem to form non-orthogonal lines when the reticle is formed withorthogonal images, and can be formed by rotating the wafer with respectto the raster-based system and directly writing onto the wafer using theraster-based system.

One aspect of the present subject matter relates to a method for forminga magnetic random access memory (MRAM) array. According to variousembodiments of the method, an image of a first wiring layer ofapproximately parallel conductors is formed in a first reticle. An imageof a second wiring layer of approximately parallel conductors is formedin a second reticle such that the conductors of the second wiring layerwould cross with the conductors of the first wiring layer at a number ofintersections. An image of a third wiring layer of approximatelyparallel conductors is formed in a third reticle such that theconductors of the third wiring layer would cross the conductors of thefirst wiring layer and the second wiring layer at the number ofintersections. The three reticles are used to process three successivemetal layers. A layer of magnetic storage elements is provided such thatthe storage elements are proximately located to the intersections andare adapted to be written by a first magnetic field produced byenergized conductors in the first wiring layer, a second magnetic fieldproduced by energized conductors in the second wiring layer, and a thirdmagnetic field produced by energized conductors in the third wiringlayer. At least one of the first wiring layer, the second wiring layerand the third wiring layer is formed after adjusting an rotationalposition (θ) of the reticle so as to be non-orthogonal with respect toat least one of the other wiring layers. One of ordinary skill in theart will understand, upon reading and comprehending this disclosure,that a non-orthogonal metallization layer can be formed when the reticlehas non-orthogonal images (formed by rotating the reticle with respectto the raster-based system), can be formed by rotating the wafer orreticle with respect to the raster-based system to form non-orthogonallines when the reticle is formed with orthogonal images, and can beformed by rotating the wafer with respect to the raster-based system anddirect writing onto the wafer using the raster-based system.

One aspect of the present subject matter relates to a raster-basedphotolithographic system for forming orthogonal and non-orthogonalimages on reticles. According to various embodiments, the systemincludes an imager and a worktable adapted to function to orthogonallyimage a workpiece (such as a reticle or a wafer) in an X direction and aY direction using a raster motion. The imager and the worktable also areadapted to adjust a rotational position of the workpiece with respect tothe raster motion. The system further includes a database, and anX-controller, a Y-controller, and a θ-controller. The database includesa first data set for writing an orthogonal image with respect to theraster motion and a second data set corresponding for writing anon-orthogonal image with respect to the raster motion. The X-controlleris adapted to control imaging of reticles or direct writing of wafers inan X direction. The Y-controller is adapted to control imaging ofreticles or direct writing of wafers in a Y direction. The θ-controlleris adapted to control an adjustment of the rotational position of theworkpiece (reticle or wafer) with respect to the raster motion.

These and other aspects, embodiments, advantages, and features willbecome apparent from the following description of the present subjectmatter and the referenced drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates a schematic diagram of a known raster-basedphotolithographic system.

FIG. 2 illustrates a stepped angled image formed using the knownraster-based photolithographic system of FIG. 1.

FIG. 3 illustrates a schematic diagram of a raster-basedphotolithographic system according to various embodiments of the presentsubject matter.

FIG. 4 illustrates an angled image formed according to variousembodiments of the present subject matter using the raster-basedphotolithographic system of FIG. 3.

FIG. 5 illustrates a schematic representation of a first image formed ona reticle using a first data set in a raster-based photolithographicsystem.

FIG. 6 illustrates a schematic representation of a second image formedon a rotated reticle (after the first image is formed in FIG. 5) using asecond data set in the raster-based photolithographic system.

FIG. 7 illustrates a MRAM according to various embodiments of thepresent subject matter with magnetic memory cells or storage deviceslocated at intersections among bit lines, word lines and select lines ina cross point array.

FIG. 8 illustrates an intersection in the cross point array of FIG. 7 inmore detail.

FIG. 9 illustrates a structure for various embodiments of the crosspoint array of FIG. 7.

FIGS. 10A, 10B and 10C illustrate horizontal word lines, angled selectlines, and angled bit lines, respectively, formed using the knownraster-based photolithographic system of FIG. 1.

FIGS. 11A, 11B and 11C illustrate horizontal word lines, non-orthogonalselect lines, and non-orthogonal bit lines, respectively, formedaccording to various embodiments of the present subject matter using theraster-based photolithographic system of FIG. 3.

FIG. 12 is a simplified block diagram of a high-level organization ofvarious embodiments of an electronic system according to the presentsubject matter.

FIG. 13 illustrates a method for forming non-orthogonal images in araster-based photolithographic system according to various embodimentsof the present subject matter.

FIG. 14 illustrates a method for aligning the second image with thefirst image according to various embodiments of the method illustratedin FIG. 13.

FIG. 15 illustrates a method for aligning the first image and the secondimage with the reticle according to various embodiments of the methodillustrated in FIG. 13.

FIG. 16 illustrates a method for forming an integrated circuitmetallization layer according to various embodiments of the presentsubject matter.

FIG. 17 illustrates a method for forming integrated circuitmetallization layers according to various embodiments of the presentsubject matter.

FIG. 18 illustrates a method for forming non-orthogonal lines on asubstrate according to various embodiments of the present subjectmatter.

FIG. 19 illustrates a method for forming non-orthogonal lines on asubstrate according to various embodiments of the present subjectmatter.

FIG. 20 illustrates a method for forming non-orthogonal lines on asubstrate according to various embodiments of the present subjectmatter.

DETAILED DESCRIPTION

The following detailed description refers to the accompanying drawingswhich show, by way of illustration, specific aspects and embodiments inwhich the present subject matter may be practiced. These embodiments aredescribed in sufficient detail to enable those skilled in the art topractice the present subject matter. Other embodiments may be utilizedand structural, logical, and electrical changes may be made withoutdeparting from the scope of the present subject matter. The followingdetailed description is, therefore, not to be taken in a limiting sense,and the scope of the present subject matter is defined only by theappended claims, along with the full scope of equivalents to which suchclaims are entitled.

The term “substrate” used in the following description may include anysemiconductor-based structure that has an exposed surface. The structuremay include silicon, silicon-on insulator (SOI), silicon-on sapphire(SOS), doped and undoped semiconductors, epitaxial layers of siliconsupported by a base semiconductor foundation, and other semiconductorstructures. The semiconductor need not be silicon-based. Thesemiconductor could be silicon-germanium, germanium, or galliumarsenide. A wafer is a slice of semiconductor material from which chipsare made, and thus form a substrate. When reference is made to a waferor substrate in the following description, previous process steps may beutilized to form regions, junctions, or layers in or on the basesemiconductor or foundation.

One definition of raster is a scan/write pattern in which an area isscanned/written from side to side in lines from top to bottom (or bottomto top). A raster-based photolithographic system, such as an e-beamsystem, writes an image on a line along an X axis, increments to a newline along a Y axis, writes an image on the new line, and so on to formthe overall image. Since the degrees of motion lie in the X directionand the Y direction, the raster-based photolithographic system providesorthogonal images. Orthogonal images are images that, at their smallestpixel level, involve orthogonal lines along the X axis and the Y axis.As is known in the art such raster based electron beam systems are usedto produce the reticles used in the modern step and repeat and step andscan photo tools. They are also used in direct write electron beamexpose tools.

The present subject matter effectively rotates a workpiece such thatnon-orthogonal images are capable of being written on the workpiece. Invarious embodiments, the present subject matter effectively rotates thereticle blank such that non-orthogonal images are capable of beingwritten on the reticle. In various embodiments, the reticle is rotatedwith respect to the orthogonal directions of motion for the e-beam andthe worktable.

In various embodiments, the present subject matter effectively rotates awafer such that non-orthogonal images are capable of being directlywritten on the wafer. In various embodiments, the wafer is rotated withrespect to the orthogonal directions of motion for the e-beam and theworktable.

In various embodiments, the present subject matter effectively rotatesthe mask such that non-orthogonal images are capable of being written onthe wafer. In various embodiments, the wafer is rotated with respect tothe orthogonal directions of the mask axes.

FIG. 3 illustrates a schematic diagram of a raster-basedphotolithographic system according to various embodiments of the presentsubject matter. The illustrated system 302 includes a worktable 306which is adapted to receive a reticle 304 and to provide a linear motionto the reticle along a Y axis using a data set 308 (such as may becontained in a programmable computer) and a worktable control module310. The illustrated system 302 also includes an electronic beam 312that sweeps back and forth along an X axis using the data set 308 and ane-beam control module 314 to perform the raster scan. One of ordinaryskill in the art will understand the system 302 includes the requiredtechnology to produce and focus the electronic beam 312.

The worktable 306, or holder, of the reticle 302 is capable of linearmotion (i.e. Y axis motion) and, according to various embodiments, iscapable of having a rotational angle (θ) adjusted. Thus, the worktable306 is capable of being at a first predetermined rotational position θ₁for imaging orthogonal lines on the reticle, and is capable of being ata second predetermined rotational position θ₂ for imaging non-orthogonallines on the reticle. One of ordinary skill in the art will understand,upon reading and comprehending this disclosure, that a number of systemsare capable of being used to provide the reticle 302 with a desiredrotational position.

According to various embodiments, the worktable 306 is capable of beingat a number of other rotational positions. According to variousembodiments, the worktable is capable of being accurately moved orstepped through a number of rotational positions from rotationalposition θ₁ to rotational position θ₂. In various embodiments, theworktable motion control module 310 is adapted to control the rotationalmotion and position of the reticle 302. In various embodiments, aregistration sensor system 321 is used to accurately detect the positionof the reticle, and to work with at least one of the control modules 310and 314 to adjust the position of the reticle 304 or otherwise registerthe image on the reticle. For example, the registration sensor system321 is capable of finely adjusting the rotation of the worktable and/oradjusting the deflection of the e-beam such that a number of images areaccurately printed with respect to each other.

One of ordinary skill in the art will understand, upon reading andcomprehending this disclosure, that the superimposed chip image is sizedand/or designed to fit in the usable area of the reticle 302 regardlessof the rotational position of the reticle. The chip image pattern isproduced using at least two data sets 316 and 318. A first data set 316is used to pattern first images (e.g. orthogonal images) when thereticle 304 is at a first rotational position θ₁. The orthogonal images,for example, can be viewed as having horizontal and vertical directionsthat are consistent with previous chip levels. A second data set 318 isused to pattern second images (non-orthogonal or angled) when thereticle is at a second rotational position θ₂. Additional data sets (N)320 are capable of being used to pattern non-orthogonal images when thereticle is at an Nth rotational position θ_(N). The data sets areoperated on by a programmable computer to provide the image patterns.One of ordinary skill in the art will understand, upon reading andcomprehending this disclosure, that the superimposed chip image may beformed either directly on a wafer or other substrate, or on a reticlewhich will be used to expose a wafer or other substrate.

FIG. 4 illustrates an angled image formed according to variousembodiments of the present subject matter using the raster-basedphotolithographic system of FIG. 3. One of ordinary skill in the artwill understand, upon reading and comprehending this disclosure, thatthe resulting non-orthogonal image has angled lines with even edges, andthat the lines and the spaces are imaged to a minimum thicknesscorresponding to the dimensions of the e-beam spot. Additionally, eachof the lines are capable of being formed with one e-beam scan motion,and as such are efficiently formed.

Raster-based photolithographic systems are capable of aligningsub-fields to, for example, place two or more chip images on a singlereticle. One of ordinary skill in the art will understand, upon readingand comprehending this disclosure, how to register a reticle toaccurately image a number of sub-fields with respect to each other.Thus, one of ordinary skill in the art will understand, upon reading andcomprehending this disclosure, how to align the first imagecorresponding to the first data set 316 with the second imagecorresponding to the second data set 318.

FIG. 5 illustrates a schematic representation of a first image formed ona reticle using a first data set in a raster-based photolithographicsystem. In the illustrated embodiment, the area 524 of the first dataset (less the alignment markings) corresponds with the usable area ofthe reticle.

According to various embodiments, alignment markings 522 on the reticle524 are used to properly position the image produced by the second dataset with the image produced by the first data set. In variousembodiments, for example, the alignment markings are included in thefirst data set and are incorporated in the orthogonal first image. Thus,the markings 522, the vertical lines 526 of the orthogonal first image,and the horizontal lines 528 of the orthogonal first image are imaged orprinted together. These alignment markings 522 from the first data setare used to align the second image that corresponds to the second dataset.

In various embodiments, for example, the alignment markings 522 arepreprinted or otherwise incorporated on the reticle 524. Thesepreprinted alignment markings 522 are used to properly position theimage of the first data set and are used to properly position the imageof the second data set.

In various embodiments, for example, the alignment markings 522 includecrosses at each corner of the chip. In various embodiments, the crossesare positioned on a line that bisects the corner angle of thereticle/chip. One of ordinary skill in the art will understand thatother alignment markings are able to be used, and that other methods forregistering the position of the reticle are anticipated. In variousembodiments, the registration sensor system 321 of FIG. 3 is used toaccurately detect the position of the reticle, and to function with atleast one of the control modules 310 and 314 to adjust the position ofthe reticle 304 or otherwise register the image on the reticle.

FIG. 6 illustrates a schematic representation of a second image formedon a rotated reticle (after the first image is formed in FIG. 5) using asecond data set in the raster-based photolithographic system. The seconddata set is rotated with respect to the first data set so that theangled lines are vertical/horizontal lines 630 with appropriatealignment markings 632. The alignment markings 632 are coincident withthe alignment markings 522 (shown in FIG. 5) when superimposed on thefirst data set.

The total area of the second data set is shown via line 634. However,there is no data (i.e. lines) outside of the area 624 of the rotatedfirst data set, except for the alignment markings 632. The imaged lines630 from the second data set are illustrated to connect the imaged linesfrom the first data set.

In the illustrated embodiment, the exposure field of the e-beam systemis as large as area 634 for the second data set, including the alignmentmarkings. The reticle size needs only be as big as the first data set,including the alignment markings.

The actual production of the reticle can be done on a number of ways,depending upon the type of alignment system used to align the e-beamfields. In various embodiments, the first data set is printed upon theresist on the plate, and the plate is removed from the system and theresist is developed and the plate metallurgy etched. A new layer ofresist is applied, the plate is placed back in to the system in arotated position, and data set two is aligned to the alignment markings.The resist is developed and the plate metallurgy etched.

In various embodiments, alignment markings are pre-positioned on thereticle prior to the first exposure. In this system, the two data setsare aligned to the pre-positioned alignment markings. The first data setis used followed by the required mask rotation and then the second dataset is used for the second exposure.

One or ordinary skill in the art, upon reading and comprehending thisdisclosure, will understand that a process sequence similar to thesequence used in the illustrated production of a reticle in FIGS. 5 and6 can be used in the raster beam direct write of a wafer or othersubstrate. Additionally, one of ordinary skill in the art willunderstand, upon reading and comprehending this disclosure, how torotate the relative position of the wafer with respect to the reticle toproduce non-orthogonal lines on the wafer when the reticle has anorthogonal image.

The systems and methods of the present subject matter are capable ofbeing used to form a magnetic random access memory (MRAM) array such asthat provided by the patent application entitled “Three TerminalMagnetic Random Access Memory,” Ser. No. 09/940,976, filed on Aug. 28,2001, which was previously incorporated by reference in its entirety. Asdiscussed therein, the three terminal MRAM significantly diminisheshalf-select errors by energizing three lines (a word line, a bit lineand a select line) rather than two lines to access a selected bit. Atleast one of the three lines is non-orthogonal with respect to the otherlines. FIGS. 7-9 illustrate various aspects for forming a three terminalmagnetic random access memory.

FIG. 7 illustrates a MRAM with magnetic memory cells or storage deviceslocated at intersections among bit lines, word lines and select lines ina cross point array. The illustrated MRAM 740 includes Word Line ControlCircuitry 742, Bit Line Control Circuitry 744, and Select Line ControlCircuitry 746. These control circuits control the current direction andmagnitude on the conductors, cooperate with each other to write to adesired magnetic storage device by providing the appropriate current toa word line conductor 750, a bit line conductor 752, and a select lineconductor 754 that corresponds to the desired magnetic storage device756. The magnetic storage device is capable of being magneticallycoupled to a magnetic field generated by current in the word line, bitline and select line conductors.

According to various embodiments, the word line conductors are orientedat an angle of approximately 60° with the bit line conductors and theselect line conductors, and the bit line conductors are oriented at anangle of approximately 60° with the select line conductors. The MRAM 740is characterized as a three terminal MRAM, as it includes requires aterminal to control the word line conductors 750, a terminal to controlthe bit line conductors 752, and a terminal to control the select lineconductors 754. All three conductors are energized to write to a desiredmemory cell 756.

FIG. 8 illustrates an intersection in the cross point array in moredetail. This intersection represents a memory cell, and includes amagnetic storage element 856, a word line conductor 850, a bit lineconductor 852, and a select line conductor 854.

FIG. 9 illustrates a structure for one embodiment of the cross pointarray of FIG. 7. In this embodiment, a properly insulated magneticstorage element 956 is interposed between a bit line 952 and a word line950 at each intersection. A select line 954 also passes operably closeto the magnetic storage element 956 at the intersection. According tovarious embodiments, the array is fabricated by forming or otherwiseproviding a word line layer, a storage element layer on the word linelayer, a bit line layer on the storage element layer, an insulator layer958 on the bit line layer, and a select line layer on the insulatorlayer. The magnetic storage element is capable of being magneticallycoupled by a magnetic field generated by a current in each of theselayers. One of ordinary skill in the art will understand, upon readingand comprehending this disclosure, that other structural designs arecapable of being used to magnetically couple the magnetic storageelement 956 with the magnetic fields produced by energizing the threelines. According to various embodiments, the magnetic storage element isa magnetoresistance device, and is electrically coupled to the word lineand the bit line.

FIGS. 10A, 10B and 10C illustrate horizontal word lines, angled selectlines, and angled bit lines, respectively, formed using the knownraster-based photolithographic system of FIG. 1. FIGS. 10A, 10B and 10Care stacked together to form the array shown in FIG. 7. The word lines1050 of FIG. 10A, the select lines 1054 of FIG. 10B, and the bit lines1052 of FIG. 10C form metallization layers, and cross each other atintersections such as is illustrated in FIGS. 7-9.

The angled select lines 1054 and the angled bit lines 1052 are steppedimages, which require more than a minimum feature size to form the linesand to separate the lines. Since both the angled select lines 1054 andthe angled bit lines 1052 are separated by a greater distance, theselect lines 1054 and the bit lines 1052 cross and form intersectionsfewer times in a given area. The horizontal lines 1050 cross the angledselect lines 1054 and the angled bit lines 1052 at the intersections,and thus are separated by a distance greater than a minimum distancethat corresponds to the pixel width or e-beam spot width. Six wordlines, six select lines and six bit lines fit within the areaillustrated in FIGS. 10A-10C.

FIGS. 11A, 11B and 11C illustrate horizontal word lines, non-orthogonalselect lines, and non-orthogonal bit lines, respectively, formedaccording to various embodiments of the present subject matter using theraster-based photolithographic system of FIG. 3. The word lines 1150 ofFIG. 11A, the select lines 1154 of FIG. 11B, and the bit lines 1152 ofFIG. 11C form metallization layers, and cross each other atintersections such as is illustrated in FIGS. 7-9.

The angled select lines 1154 and the angled bit lines 1152 have evenedges, and are imaged to a minimum thickness corresponding to thefeature size or e-beam spot. Because the parallel angled lines areseparated by a minimum distance, the angled select lines 1154 and theangled bit lines 1152 cross and form intersections more times in a givenarea. The horizontal lines 1150 cross the angled select lines 1154 andthe angled bit lines 1152 at the more densely-packed intersections, andthus are capable of being closer together. Nine word lines, ten selectlines and ten bit lines fit within the area illustrated in FIGS.11A-11C, as compared to the six word lines, six select lines and six bitlines fit within the area illustrated in FIGS. 10A-10C. Thus, thepresent subject matter provides more compact, three-terminal MRAMdesigns as compared to using stepped angled images from a conventional,raster-based photolithographic system.

System Level

FIG. 12 is a simplified block diagram of a high-level organization ofvarious embodiments of an electronic system according to the presentsubject matter. In various embodiments, the system 1200 is a computersystem, a process control system or other system that employs aprocessor and associated memory. The electronic system 1200 hasfunctional elements, including a processor or arithmetic/logic unit(ALU) 1202, a control unit 1204, a memory device unit 1206 and aninput/output (I/O) device 1208. Generally such an electronic system 1200will have a native set of instructions that specify operations to beperformed on data by the processor 1202 and other interactions betweenthe processor 1202, the memory device unit 1206 and the I/O devices1208. The control unit 1204 coordinates all operations of the processor1202, the memory device 1206 and the I/O devices 1208 by continuouslycycling through a set of operations that cause instructions to befetched from the memory device 1206 and executed. According to variousembodiments, the memory device 1206 includes, but is not limited to,random access memory (RAM) devices, read-only memory (ROM) devices, andperipheral devices such as a floppy disk drive and a compact disk CD-ROMdrive. As one of ordinary skill in the art will understand, upon readingand comprehending this disclosure, any of the illustrated electricalcomponents are capable of being fabricated to include a chip producedwith non-orthogonal photolithography in accordance with the presentsubject matter.

The illustration of system, as shown in FIG. 12, is intended to providea general understanding of one application for the structure andcircuitry of the present subject matter, and is not intended to serve asa complete description of all the elements and features of an electronicsystem that uses non-orthogonal photolithographic processes according tothe present subject matter. As one of ordinary skill in the art willunderstand, such an electronic system can be fabricated insingle-package processing units, or even on a single semiconductor chip,in order to reduce the communication time between the processor and thememory device.

Applications that use non-orthogonal photolithographic processes asdescribed in this disclosure include electronic systems for use inmemory modules, device drivers, power modules, communication modems,processor modules, and application-specific modules, and may includemultilayer, multichip modules. Such circuitry can further be asubcomponent of a variety of electronic systems, such as a clock, atelevision, a cell phone, a personal computer, an automobile, anindustrial control system, an aircraft, and others.

Method Aspects

The figures presented and described in detail above are similarly usefulin describing the method aspects of the present subject matter. Themethods described below are nonexclusive as other methods may beunderstood from the specification and the figures described above.

FIG. 13 illustrates a method for forming non-orthogonal images in araster-based photolithographic system according to various embodimentsof the present subject matter. In the illustrated method 1300, a firstimage is formed at 1302 when the reticle is at a first rotational angleθ₁. The first image corresponds to a first data set. For example, thefirst image may be formed to be orthogonal with respect to otherphotolithographic images on the reticle.

At 1304, the reticle is adjusted to a second rotational angle θ₂. At1306, a second image corresponding to a second data set is formed whenthe reticle is at the second rotational angle θ₂. According to variousembodiments, the difference between the angles θ₂−θ₁ is not 0°, 90°,180° or 270° such that the second image is non-orthogonal with respectto the first image. According to various embodiments, the reticle isadjusted by rotating the worktable from the first rotational angle θ₁ tothe second rotational angle θ₂. According to various embodiments, thereticle is adjusted by accurately stepping the worktable through anumber of rotational positions from the first rotational angle θ₁ to thesecond rotational angle θ₂.

Additional images are formed on the reticle in various embodiments. Forexample, the reticle is adjusted to an Nth rotational position θ_(N) at1308, and at 1310, an Nth image corresponding to an Nth data set isformed on the reticle when the reticle is at the rotational positionθ_(N).

One of ordinary skill in the art will understand, upon reading andcomprehending this disclosure, how to substitute a wafer or otherworkpiece for the reticle shown in FIG. 13 for a direct write electronbeam or similar direct write system.

FIG. 14 illustrates a method for aligning the second image with thefirst image according to various embodiments of the method illustratedin FIG. 13. In the illustrated method 1412, a first image includesalignment markings, and is formed on the reticle at 1414 when thereticle is at a first rotational position θ₁. At 1416, the image ispositioned at a second rotational position θ₂ and is registered to thealignment markings formed as part of the first image. One of ordinaryskill in the art will know how to register to the reticle to thealignment markings. According to various embodiments, the reticle isrotated between the first rotational position θ₁ and the second rotationposition θ₂. According to various embodiments, the reticle is accuratelystepped through a number of rotational positions between the firstrotational position θ₁ and the second rotation position θ₂. At 1418, asecond image is formed at θ₂.

FIG. 15 illustrates a method for aligning the first image and the secondimage with the reticle according to various embodiments of the methodillustrated in FIG. 13. In the illustrated method 1520, at 1522, thereticle is positioned at a first rotational position θ₁ and isregistered to alignment markings already preprinted or otherwiseidentified on the reticle. At 1524, a first image is formed at the firstrotational position θ₁. At 1526, the reticle is positioned at a secondrotational position θ₂ and the image is registered to the alignmentmarkings. One of ordinary skill in the art will understand, upon readingand comprehending this disclosure, that in various embodiments, theimage used at 1526 is a different image than that used at 1522. At 1528,a second image is formed at the second rotational position θ₂.

FIG. 16 illustrates a method for forming an integrated circuitmetallization layer according to various embodiments of the presentsubject matter. In the illustrated method 1630, an insulator isdeposited on a wafer at 1632, and a resist is deposited on the insulatorat 1634. At 1636, a first image is formed on the resist when the reticleis at a first rotational position θ₁. At 1638, the second reticle isadjusted and appropriately registered to a second rotational positionθ₂. At 1640, a second image is formed on the resist when the reticle isat the second rotational position θ₂. The first and second images aredeveloped at 1642, and at 1644, the wafer is processed to form ametallization layer using the damascene process based on the developedfirst and second images. One of ordinary skill in the art willunderstand, upon reading and comprehending this disclosure, that themetallization layer also can be formed using subtractive etch process.Thus, a single metallization layer is capable of including bothorthogonal and non-orthogonal lines.

FIG. 17 illustrates a method for forming integrated circuitmetallization layers according to various embodiments of the presentsubject matter. In the illustrated method 1746, a first insulator isdeposited on a wafer at 1748, and a first resist is deposited on thefirst insulator at 1750. At 1752, a first image is formed on the resistwhen the first reticle is at a first rotational position θ₁. The firstimage is developed at 1754, and at 1756, the wafer is processed to forma first metallization layer using the damascene process based on thedeveloped first image. One of ordinary skill in the art will understand,upon reading and comprehending this disclosure, that the wafer can beprocessed to form the metallization layer using a subtractive etchprocess. The damascene process and the subtractive etch process areknown. Upon reading and comprehending this disclosure, those of ordinaryskill in the art will understand how to incorporate the present subjectwith these processes.

At 1758, a second insulator is deposited on the wafer, and a secondresist is deposited on the second insulator at 1760. At 1762, theprocess uses a second reticle which was imaged registered a secondrotational position θ₂. The reticle is appropriately registered to thefirst level. At 1764, a second image is formed on the resist. The secondimage is developed at 1766, and at 1768, the wafer is processed to forma metallization layer based on the developed second image. Thus, as theimage on the second reticle was placed at an angle to the first, onemetallization layer is capable of being non-orthogonal with respect toanother metallization layer.

FIG. 18 illustrates a method for forming non-orthogonal lines on asubstrate according to various embodiments of the present subjectmatter. In the illustrated method, a reticle is formed with anon-orthogonal image at 1870. According to various embodiments, thenon-orthogonal image is formed on the reticle by rotating or otherwiseadjusting the reticle to a desired rotational position, and forming thenon-orthogonal image on the rotated reticle using a raster-basedphotolithographic system. At 1872, the non-orthogonal lines are formedon the substrate/wafer using the reticle.

FIG. 19 illustrates a method for forming non-orthogonal lines on asubstrate according to various embodiments of the present subjectmatter. In the illustrated method, at 1974 a reticle is formed with anorthogonal image using a raster-based system. The relative positionbetween the reticle and the substrate/wafer is registered at 1976. Invarious embodiments, the reticle is rotated to register the relativeposition. In various embodiments, the substrate is rotated to registerthe relative position. At 1978, non-orthogonal lines are formed on thesubstrate/wafer using the reticle.

FIG. 20 illustrates a method for forming non-orthogonal lines on asubstrate according to various embodiments of the present subjectmatter. In the illustrated method, a rotational position of thesubstrate/wafer is registered at 2080. A non-orthogonal image isdirectly written on the substrate at 2082.

CONCLUSION

The present subject mater relates to improved photolithographictechniques for forming non-orthogonal (angled) lines. The presentsubject matter provides a modified raster-based photolithographicprocess in which a rotational angle (θ) of a reticle is adjusted tochange the reference of the orthogonal, raster-based system. Thus,orthogonal lines are capable of being printed using a first data set,and after θ is adjusted, non-orthogonal lines are capable of beingprinted using a second data set. The present subject matter allowsnon-orthogonal lines to be formed at the same minimum thickness as theorthogonal lines, to be formed with even line edges, and to be formedefficiently since each line is capable of being printed in a singlescan.

In various embodiments, the present subject matter is used to producereticles with non-orthogonal lines. In various embodiments, the presentsubject matter is used to rotate a relative position between a wafer anda reticle to produce non-orthogonal lines on the wafer from theorthogonal lines on the reticle. In various embodiments, the presentsubject matter is used to directly write non-orthogonal lines on awafer.

This disclosure refers to several figures that resemble flow diagrams.One of ordinary skill in the art will understand, upon reading andcomprehending this disclosure, that the methods related to the flowdiagrams may occur in the order as illustrated in the flow diagrams, andmay be ordered in another manner. Thus, the present subject matter isnot limited to a particular order or logical arrangement.

Although specific embodiments have been illustrated and describedherein, it will be appreciated by those of ordinary skill in the artthat any arrangement which is calculated to achieve the same purpose maybe substituted for the specific embodiments shown. This application isintended to cover adaptations or variations of the present subjectmatter. It is to be understood that the above description is intended tobe illustrative, and not restrictive. Combinations of the aboveembodiments, and other embodiments, will be apparent to those of skillin the art upon reviewing the above description. The scope of thepresent subject matter should be determined with reference to theappended claims, along with the full scope of equivalents to which suchclaims are entitled.

1. A device, comprising: a semiconductor substrate; and an integratedcircuit formed on the semiconductor substrate, the integrated circuitincluding at least a first line, a second line and a third line, thefirst line being oriented in a first direction, the second line beingoriented in a second direction orthogonal to the first direction, thethird line being oriented in a third direction that is non-orthogonaland non-parallel to both the first and second directions, the first andthe second lines having a minimum design line width, and thenon-orthogonal and non-parallel third line having the same minimumdesign line width.
 2. The device of claim 1, wherein the third directionincludes 45 degrees to both the first and second directions.
 3. Thedevice of claim 1, wherein the integrated circuit comprises a pluralityof semiconductor devices.
 4. The device of claim 3, wherein theplurality of semiconductor devices includes devices having edges thatare oriented in the first and second directions, and devices having atleast one edge oriented in the third direction.
 5. The device of claim3, wherein the plurality of semiconductor devices are interconnected bymetal conductor lines having orientations in the first direction, thesecond direction and the third direction.
 6. The device of claim 5,wherein the metal conductor lines include lines on more than a singlelevel.
 7. The device of claim 6, wherein the metal conductor linesinclude lines on three different levels, each level including apatterned insulator layer disposed beneath the level.
 8. The device ofclaim 1, wherein the integrated circuit comprises a plurality ofdevices, at least one of the plurality of devices having an outlinecomprising straight lines in the first, second and third directions,wherein all of the straight lines are substantially smooth.
 9. Anintegrated circuit chip, comprising: a semiconductive substrate; and aplurality of semiconductor devices formed on the semiconductivesubstrate, each individual one of the plurality having a shape definableby a polygon of straight lines that are substantially smooth, each ofthe straight lines having an orientation in one of a first direction, asecond direction orthogonal to the first direction, and a thirddirection non-orthogonal and non-parallel to both the first and seconddirections, at least one of the plurality of semiconductor deviceshaving a shape with a straight line in the third direction.
 10. Theintegrated circuit chip of claim 9, wherein the third direction includes45 degrees to both the first and second directions.
 11. The integratedcircuit chip of claim 9, wherein the straight lines in the first and thesecond directions have a minimum design line width, and one of thenon-orthogonal and non-parallel lines in the third direction has thesame minimum design line width.
 12. The integrated circuit chip of claim9, further comprising at least one minimum dimension metal conductorline in each of the first direction, the second direction and the thirddirection.
 13. The integrated circuit chip of claim 12, wherein at leastone of the minimum dimension conductor lines electrically connect atleast two of the plurality of semiconductor devices.
 14. The integratedcircuit chip of claim 12, wherein the metal conductor lines includelines on more than a single level.
 15. The integrated circuit chip ofclaim 14, wherein the metal conductor lines include lines on threedifferent levels, each level including a patterned insulator layerdisposed beneath the level.
 16. A semiconductor wafer, comprising: asemiconductive substrate having a plurality of individual integratedcircuits, each integrated circuit including four orthogonal sidesoriented in one of a first direction and a second direction; eachindividual integrated circuit having a plurality of semiconductordevices, each individual one of the plurality of semiconductor deviceshaving a shape definable by a polygon of straight lines, each of thestraight lines having an orientation value with respect to the firstdirection and second direction; and at least one of the plurality ofsemiconductor devices including at least one straight line that has anorientation that is non-orthogonal and non-parallel to the first andsecond directions.
 17. The semiconductor wafer of claim 16, wherein thenon-orthogonal and non-parallel orientation is 45 degrees with respectto the first and second directions.
 18. The semiconductor wafer of claim16, wherein at least one of the semiconductor devices has at least twolines that are oriented orthogonal to one of the first and seconddirections, and ends of the at least two lines are connected to eachother by at least one line having an orientation that is non-orthogonaland non-parallel to the first and second directions.
 19. Thesemiconductor wafer of claim 16, wherein the plurality of semiconductordevices includes devices having a rectangular shape having sidesoriented to at least one of the first and second direction, and deviceshaving a non-rectangular shape and at least one side that isnon-orthogonal and non-parallel to the first and second directions. 20.The semiconductor wafer of claim 19, wherein the plurality ofsemiconductor devices includes conductive interconnections having aminimum allowable width, with at least one interconnection having theminimum allowable width on each of the individual integrated circuitshaving an orientation that is non-orthogonal and non-parallel to firstand second directions.
 21. The semiconductor wafer of claim 20, whereinthe non-orthogonal and non-parallel orientation is 60 degrees withrespect to at least one of the orthogonal sides.
 22. The semiconductorwafer of claim 20, wherein the non-orthogonal and non-parallelorientation is 30 degrees with respect to at least one of the orthogonalsides.
 23. The semiconductor wafer of claim 22, wherein the metalconductor lines include lines on more than a single level.
 24. Thesemiconductor wafer of claim 23, wherein the metal conductor linesinclude lines on three different levels, each level including apatterned insulator layer disposed beneath the level.
 25. Thesemiconductor wafer of claim 16, wherein each individual one of thestraight lines has edges that are substantially smooth.
 26. Aphotolithography mask, comprising: a substrate having at least onepattern; the pattern including a first line, a second line and a thirdline, the first line having an orientation in a first direction, thesecond line having an orientation in a second direction orthogonal tothe first direction, and the third line having an orientation in a thirddirection that is non-orthogonal and non-parallel to both the first andsecond directions; and the pattern including lines having a plurality ofwidths, including lines having a minimum allowable design width in eachone of the first, second and third directions.
 27. The photolithographymask of claim 26, wherein the orientation of the third line isapproximately 45 degrees with respect to the first and seconddirections.
 28. The photolithography mask of claim 26, wherein the atleast one pattern comprises a single layer pattern of an integratedcircuit chip.
 29. The photolithography mask of claim 26, whereinportions of the substrate are substantially transparent to electronbeams.
 30. The photolithography mask of claim 26, wherein the patternincludes structures having rectangular shapes with sides parallel to oneor more of the first direction and the second direction, and the patternincludes structures having at least one side having an orientation inthe third direction.
 31. A device, comprising: a work piece; a firstline on the work piece oriented in a first direction; a second line onthe work piece oriented in a second direction that is non-orthogonal andnon-parallel to the first direction; and the first and second lineshaving a minimum photolithographic design width, and having asubstantially even edge.
 32. The device of claim 31, wherein the workpiece includes a reticle.
 33. The device of claim 31, wherein the workpiece includes a wafer.
 34. The device of claim 31, wherein the firstline defines a first conductor line and the second line defines a secondconductor line.
 35. The device of claim 34, further comprising a thirdline on the work piece, the third line defining a third conductor line,the second line connecting the first line to the third line.
 36. Thedevice of claim 35, wherein the third line is oriented in a thirddirection orthogonal to the first direction.
 37. The device of claim 35,wherein the third line is oriented in a direction parallel to the firstdirection.
 38. The device of claim 31, wherein the first and secondlines define first and second edges of a device shape.